1. Field of the Invention
The present invention generally relates to digital signal processing and, more particularly, to an enhanced data acquisition for wide dynamic range digital signal processing.
2. Description of the Prior Art
Digital processing of analog signals in systems such as radars has become widely adopted because of the advantage of component economics and inherent stability and accuracy as compared to analog signal processing. Since the output of radars are analog in nature, a converter function is employed to transform the data to a binary digital representation. The converter function is ordinarily linear in that the binary value representation at the output of the converter is directly proportional to the analog input level.
Using radar as an example, it is often the case that signals must be processed which vary widely in amplitude in order to discern characteristics of a radar signal from both distant small targets and large close targets. In the present state of the art, this situation has dictated the design and use of analog-to-digital (A/D) converters with outputs comprising a large number of bits. In many cases the bit range necessary to satisfy the dynamic range requirement is far greater than the resolution needed to discern useful characteristics of radar targets. Characteristics of a particular radar target such as doppler velocity may be discernable in an amplitude range of less than about 30 db as referenced to the maximum amplitude detected in a measurement sequence; whereas, more than 80 db of dynamic range may be required for undistorted measurements of possible targets of interest.
There are several different circuit methods for performing the A/D conversion; in general, however, there is a design tradeoff necessary between dynamic range and speed. The fastest conversion techniques are not practical for wide data width applications. Since some applications, and in particular, many radar applications, have a requirement for both wide dynamic range as well as fast conversion speeds, performance compromises are often necessitated else expensive and complex hybrid type data converters must be utilized Furthermore, when wide digital data buses are utilized a commensurate burden exists on the computational requirements to implement digital signal processing algorithms.